Cad System for the Atmel Fpga Circuits
نویسندگان
چکیده
In this paper we present a CAD system for logic design using the Atmel 6000 series FPGA circuits. The design input is a textual description in the ABEL hardware description language. This description is compiled into a set of equations. From this set of equations, an internal representation of the digital circuit is generated. Then, the CAD system performs the technology mapping, placement and routing steps, and generates a file for configuring the FPGA circuit. The technology mapping algorithm also tries to reduce the complexity of the placement and routing steps. We describe a bipartitioning algorithm, that not only balances the size of the two partitions, but also evenly distributes the connections among them. The routing algorithm implemented simultaneously treats the global and local routing. According to the sorting of the connection list, we can have two kinds of optimizations: area optimization and speed optimization.
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